Differences

This shows you the differences between two versions of the page.

Link to this comparison view

Both sides previous revision Previous revision
Next revision
Previous revision
en:group:members:anant [2011/01/20 21:24]
singh
en:group:members:anant [2018/03/19 09:48]
shokroll
Line 13: Line 13:
 /* Here you should write the content of the page (and remove the lorem ipsum placeholder */ /* Here you should write the content of the page (and remove the lorem ipsum placeholder */
  
-Anant joined ALGO in Oct 2010 to work on the Kandou project which is funded by a grant from the MICS Spin Fund.+Anant joined ALGO in Oct 2010 to work on implementation of power efficient signaling methods for chip to chip communication
  
 Prior to joining ALGO, Anant was a Product Design Manager at [[http://​www.z-ram.com|Innovative Silicon'​s]] R&D offices at Lausanne where he led the development of micro-architecture and design of Z-RAM IP (1T cell, floating body) based memory solutions for L3 cache in AMD's lead microprocessors and Hynix'​s DDR3 based DRAM products. ​ Prior to joining ALGO, Anant was a Product Design Manager at [[http://​www.z-ram.com|Innovative Silicon'​s]] R&D offices at Lausanne where he led the development of micro-architecture and design of Z-RAM IP (1T cell, floating body) based memory solutions for L3 cache in AMD's lead microprocessors and Hynix'​s DDR3 based DRAM products. ​
  
-Anant worked at Intel Corp from 1999 to 2005 in Portland, Oregon as a senior member of the technical staff on several generations of Pentium and Core-duo processors. He was a key contributor for the productization of a novel logic family (LVS, low voltage swing) that enabled a dual pumped Integer Execution core and L0 cache on Pentium-4 processor to operate in excess of 8GHz. This work was published in IEEE's Journal of Solid State Circuits in 2005.+Anant worked at Intel Corp from 1999 to 2005 in Portland, Oregon as a senior member of the technical staff on several generations of Pentium and Core-duo processors.
  
 Anant received his M.S.E.E. degree from University of Washington, Seattle in 1998. Anant received his M.S.E.E. degree from University of Washington, Seattle in 1998.
 +
 +Anant is now a lead engineer at [[http://​www.kandou.com|Kandou Bus]].
  
 /*  /* 
Line 34: Line 36:
 birthday_dt ​     : birthday_dt ​     :
 join_dt ​            : 2010-10-01 join_dt ​            : 2010-10-01
-left_dt ​             : 2035-12-31            +left_dt ​             : 2011-02-31            
-webpage_url ​   : +webpage_url ​   :  ​https://​ch.linkedin.com/​in/​anant-singh-79a18310|Anant Singh
 portrait_media ​    : en:​group:​members:​rimg_anant.jpg portrait_media ​    : en:​group:​members:​rimg_anant.jpg
 avatar_img64 : en:​group:​members:​rimg_anant.jpg avatar_img64 : en:​group:​members:​rimg_anant.jpg
Line 42: Line 44:
 position ​           : Engineer position ​           : Engineer
 listgroup ​          : e_asingh listgroup ​          : e_asingh
-status ​               : ​active+state                : ​past
 table              : members table              : members
 +Summary : Anant joined ALGO in Oct 2010 to work on implementation of power efficient signaling methods for chip to chip communication. Prior to joining ALGO, Anant was a Product Design Manager at [[http://​www.z-ram.com|Innovative Silicon'​s]] R&D offices at Lausanne where he led the development of micro-architecture and design of Z-RAM IP (1T cell, floating body) based memory solutions for L3 cache in AMD's lead microprocessors and Hynix'​s DDR3 based DRAM products. Anant worked at Intel Corp from 1999 to 2005 in Portland, Oregon as a senior member of the technical staff on several generations of Pentium and Core-duo processors.Anant received his M.S.E.E. degree from University of Washington, Seattle in 1998.He is now VP of Engineering at [[http://​www.kandou.com|Kandou Bus]].
 ---- ----
- 
-